Recruitment position : Analog chip layout design engineer

Job responsibilities:

1. Assist the design engineer to complete the chip layout;

2. According to the layout of the chip, design the internal layout of the module complete the layout design of the module;

3. Complete chip module design Top Layout connection independently;

4. Design the IC layout according to the requirements of the design engineer, including consideration of signal wiring, resistance transistor matching, high current wiring, ESD devices, Latch up rule, etc;

5. Complete DRC/LVS verification XRC extraction;

6. Check backup the DRC, LVS, LVL, GDS, NETLIST, SCHEMATIC LAYOUT data to ensure that the data sent is prepared correctly.

Job requirements:

1. Bachelor degree or above in microelectronics or electronics related majors;

2. Layout work experience of more than 2 years, with experience in layout design preferred;

3. Be familiar with Linux/Unix operating system the use of layout tools such as virtuoso calibre;

4. Proficiently use Calibre for drc/lvs/xrc verification;

5. Underst the principle of matching/ESD/catch up/antenna effect;

6. Have a certain understing of CMOS process.

Location: Beijing/Chengdu